Texas Instruments /MSP432E401Y /GPIOA /PC

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Interpret as PC

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIO_PC_EDM0_DISABLE)GPIO_PC_EDM0 0GPIO_PC_EDM1 0GPIO_PC_EDM2 0GPIO_PC_EDM3 0GPIO_PC_EDM4 0GPIO_PC_EDM5 0GPIO_PC_EDM6 0GPIO_PC_EDM7

GPIO_PC_EDM0=GPIO_PC_EDM0_DISABLE

Description

GPIO Peripheral Configuration

Fields

GPIO_PC_EDM0

Extended Drive Mode Bit 0

0 (GPIO_PC_EDM0_DISABLE): Drive values of 2, 4 and 8 mA are maintained. GPIO n Drive Select (GPIODRnR) registers function as normal

1 (GPIO_PC_EDM0_6MA): An additional 6 mA option is provided

3 (GPIO_PC_EDM0_PLUS2MA): A 2 mA driver is always enabled; setting the corresponding GPIODR4R register bit adds 2 mA and setting the corresponding GPIODR8R of GPIODR12R register bit adds an additional 4 mA

GPIO_PC_EDM1

Extended Drive Mode Bit 1

GPIO_PC_EDM2

Extended Drive Mode Bit 2

GPIO_PC_EDM3

Extended Drive Mode Bit 3

GPIO_PC_EDM4

Extended Drive Mode Bit 4

GPIO_PC_EDM5

Extended Drive Mode Bit 5

GPIO_PC_EDM6

Extended Drive Mode Bit 6

GPIO_PC_EDM7

Extended Drive Mode Bit 7

Links

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